Drimva

Micron

Staff Engineer, ASIC Digital Design

$150K–$256K

Minneapolis, MN · Staff · Full-time · Posted Oct 29, 2026

Experience
8+ years of industry experience.
Education
B.S./M.S./Ph.D. in Electrical Engineering.

About the job

Leads digital ASIC and controller IP design, from translating requirements into RTL through verification, silicon bring-up, and technical mentorship.

What you'll do

  • Develop microarchitecture specifications and RTL for DRAM/NAND/SSD controllers and systems, balancing performance, power, area, timing, and testability.
  • Own or support simulation, synthesis, timing closure, formal verification, gate-level validation, chip bring-up, and lab validation.
  • Provide technical leadership through design reviews, mentoring, problem solving, and engineering best practices.

What they ask for

  • B.S., M.S., or Ph.D. in Electrical Engineering.
  • 8+ years of industry experience.
  • Strong SystemVerilog RTL design and verification knowledge, including high-speed IO crossings.
  • Experience with software programming and Linux shell scripting; understanding of analog and mixed-signal circuits and simulation.

Nice to have

  • Experience with DRAM interfaces, memory-system RAS, and RTL development.
  • Experience with industry-standard synthesis, linting, equivalency, and formal verification tools.

Pay

$150,000.00 - $256,000.00 USD a year (base salary)

Tools

SystemVerilog, Linux, python, CMOS/CML, PLL, DLL, CDR

AI focus

Willingness to learn and use AI tools in the ASIC design flow; knowledge of Generative AI in the ASIC design flow.

Model-written summary · the original posting is authoritative

First seen Oct 30, 2026 · Last verified Nov 5, 2026 (UTC)