Micron
Staff HBM Design Architect - DFT
$146K–$297K
Richardson, TX +1 · Staff · Full-time · Posted May 13, 2026
- Location
- Richardson, TX
Folsom, CA - Experience
- 5+ years in DRAM or ASIC DFT design or verification.
- Education
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
About the job
Defines and implements DFT architectures and test flows for HBM products from wafer probe through system-level testing.
What you'll do
- Develop end-to-end DFT architectures and test strategies for HBM base dies, DRAM dies, and stacked-die products.
- Architect test access mechanisms and enable silicon observability for yield learning, debug, and failure analysis.
- Collaborate with design, verification, layout, test, and manufacturing teams.
What they ask for
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
- Strong knowledge of scan, MBIST, JTAG, and boundary scan concepts.
- Experience with wafer probe and final test semiconductor flows.
- 5+ years of experience in DRAM or ASIC DFT design or verification.
Nice to have
- Experience with HBM, DRAM, or advanced memory products; knowledge of TSV-based 3D integration and stacked-die test challenges.
- Hands-on experience with at-speed test or advanced DFT techniques; exposure to DFT security features or custom customer test interfaces.
Pay
$146,000.00 - $297,000.00 a year (USD, base salary)
Tools
scan, MBIST, JTAG, boundary scan, TSV
Model-written summary · the original posting is authoritative