Micron
Staff Physical Design Engineer, HBM
Richardson, TX · Staff · Full-time · Posted Aug 25, 2026
- Experience
- Required: 7+ years in a related field with a bachelor's degree. Desired alternative: 5+ years in a related field with a master's degree.
- Education
- Required: Bachelor's degree in EE with good understanding of computer architecture. Desired: Master's degree in EE / CE.
About the job
Implements and signs off high-performance, low-power physical designs for HBM products from synthesized netlist through GDSII, focusing on timing, power integrity, and manufacturability.
What you'll do
- Own physical design implementation, including floorplanning, placement, clock tree synthesis, routing, and physical signoff.
- Drive timing closure and resolve congestion, IR drop, EM, and power-integrity issues across design scenarios.
- Collaborate with RTL, DFT, CAD, and verification teams; use AI-enabled tools and automation to improve design flows.
What they ask for
- Strong understanding of RTL-to-GDSII physical design, including floorplanning, place and route, clock distribution, and timing closure.
- Experience with full-chip integration, partitioning, and budgeting; understanding of power, performance, and area tradeoffs.
- Knowledge of low-power architectures, including DVFS, power gating, and multi-voltage designs; experience validating PDN, IR/EM.
- Proficiency in TCL, Python, Perl, or Shell scripting.
Nice to have
- Experience with advanced technology nodes, high-frequency/high-density designs, or complex clocking schemes.
- Familiarity with memory, HBM, or datapath-intensive designs; 3D-IC, advanced packaging, or thermal considerations.
Tools
TCL, Python, Perl, Shell scripting, UPF/CPF
AI focus
Use AI-enabled tools in the netlist-to-GDS flow.
Model-written summary · the original posting is authoritative