Microsoft
Design Verification Engineer
$85K–$184K
Raleigh, NC · On-site · Full-time · Posted Oct 31, 2026
- Experience
- Preferred experience alternatives: 3+ years related technical engineering experience; or bachelor's degree plus 2+ years technical engineering or internship experience; or master's degree plus 1+ year technical engineering or internship experience; or doctorate plus 0+ years technical engineering or internship experience. The preferred qualifications also state a master's degree, or bachelor's degree plus 2+ years technical engineering experience, or equivalent experience.
- Education
- Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field OR equivalent experience.
About the job
Develops verification automation and environments for next-generation fabric interconnects and/or memory controllers, using simulation, formal methods, and generative AI to improve hardware quality and efficiency.
What you'll do
- Verify fabric interconnect or memory subsystems; develop UVM/System Verilog integration-level environments and run and debug simulations.
- Apply formal-based methods and improve verification efficiency through methodologies or tools.
- Apply generative AI solutions to verification work.
What they ask for
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field, or equivalent experience.
- Meet required Microsoft, customer, and/or government security screening requirements, including the Microsoft Cloud Background Check and citizenship/status verification for export-controlled information.
Nice to have
- Understanding of CHI, AMBA, JEDEC, or DFI protocols and/or memory controllers, fabric interconnects, coherency, virtualization, security, interrupts, PCIe, CXL, or protocol bridges.
- Software development and automation skills, including Python and TypeScript; verification experience with UVM or SVTB; experience applying generative AI.
Pay
USD $85,400 - $168,100 per year (base pay); USD $111,100 - $183,700 per year (base pay)
Tools
UVM, System Verilog, Python, TypeScript, SVTB, CHI, AMBA, PCIe
AI focus
Applies generative AI solutions to verification work; experience applying generative AI to day-to-day tasks is preferred.
Model-written summary · the original posting is authoritative