Microsoft
Design Verification Engineer - DDR Memory Subsystem
$102K–$219K
Raleigh, NC +3 · On-site · Full-time · Posted Sep 30, 2026
- Location
- Raleigh, NC
Austin, TX
Hillsboro, OR
Mountain View, CA - Experience
- Required: 1+ year(s) with a master's degree, or 2+ years with a bachelor's degree, in technical engineering; equivalent experience accepted. Preferred alternatives: doctorate; or master's degree and 3+ years; or bachelor's degree and 5+ years; or equivalent experience.
- Education
- Required: Master's or bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field, or equivalent experience. Preferred: doctorate or master's degree in a listed field.
About the job
Verifies DDR memory controller IP and subsystems by developing verification environments, running simulations, and improving hardware verification quality and efficiency.
What you'll do
- Own verification of memory controller IP or subsystem features; define verification strategies and test plans with partner teams.
- Develop UVM-based and/or Formal verification environments, run and debug simulations, and use random stimulus and coverage-based techniques to find bugs.
- Improve verification methods or tools, apply generative AI to verification work, and coach and mentor others.
What they ask for
- Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 1+ year(s) technical engineering experience; OR bachelor's degree in one of these fields and 2+ years technical engineering experience; OR equivalent experience.
- Ability to meet Microsoft, customer and/or government security screening requirements, including the Microsoft Cloud Background Check.
- Provide proof of citizenship, US residency, or other protected status for export-control eligibility assessment; citizenship will be verified with a valid passport, with other documents applicable to lawful permanent residents, refugees, and asylees.
Nice to have
- Understanding of CHI, AMBA protocols, and JEDEC specification; or memory controllers, fabric interconnects, coherency, security, interrupts, PCIe, CXL, or protocol bridges.
- Experience with IP verification, UVM, SVTB, formal test benches, Python, or applying generative AI to day-to-day tasks.
Pay
USD $102,100 - $202,200 per year (base pay); USD $133,800 - $219,200 per year (base pay)
Tools
UVM, Formal, Coherent Hub Interface (CHI), Advanced Microcontroller Bus Architecture (AMBA), JEDEC, PCIe, CXL, Python
AI focus
Apply generative AI solutions to verification work; experience applying generative AI to day-to-day tasks is preferred.
Model-written summary · the original posting is authoritative