Drimva

Microsoft

Principal Design Verification Engineer

$143K–$304K

Redmond, WA +4 · On-site · Principal · Full-time · Posted Oct 28, 2026

Location
Redmond, WA
Mountain View, CA
Hillsboro, OR
Austin, TX
Raleigh, NC
Experience
3+ years with a doctorate, 6+ years with a master's degree, or 8+ years with a bachelor's degree; equivalent experience is also accepted. Preferred: 9+ years in silicon verification and 5+ years in chip/computer architecture.
Education
Doctorate, master's, or bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field; or equivalent experience.

About the job

Verifies Microsoft AI accelerators through silicon design verification, from creating test environments and plans to debugging simulations and supporting post-silicon validation.

What you'll do

  • Create verification environments, tests, reference models, and verification plans for IP, subsystem, and SoC designs.
  • Develop verification components and scripts, drive feature coverage, and debug testbench, simulation, and emulation failures.
  • Collaborate across engineering teams on design challenges and post-silicon validation.

What they ask for

  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or a related field and 3+ years of technical engineering experience; OR a master's degree in one of these fields and 6+ years; OR a bachelor's degree in one of these fields and 8+ years; OR equivalent experience.
  • Meet Microsoft, customer, and/or government security screening requirements, including the Microsoft Cloud Background Check.
  • Provide citizenship or qualifying residency/protected-status documentation for export-control eligibility assessment.

Nice to have

  • 9+ years creating simulation environments, developing tests, and debugging for multiple silicon IPs or systems; 5+ years in chip and/or computer architecture.
  • Experience with Verilog or VHDL, C/C++, scripting languages, System Verilog, UVM, CPU or graphics core verification, hardware emulation or FPGAs, or firmware development.

Pay

USD $142,800 - $274,800 per year (base salary); USD $188,000 - $304,200 per year (base salary)

Tools

Verilog, VHDL, C/C++, Python, Ruby, Perl, System Verilog, UVM

AI focus

Verifies Microsoft’s latest AI accelerators; no AI model development is stated.

Model-written summary · the original posting is authoritative

First seen Oct 15, 2026 · Last verified Nov 5, 2026 (UTC)