Drimva

Microsoft

Quantum Systems Digital Design Engineer II

$102K–$219K

Redmond, WA · On-site · Full-time · Posted Aug 21, 2026

Experience
Master's: 1+ years in industry or research and development; Bachelor's: 2+ years; or equivalent experience. Preferred qualifications include 3+ years building production FPGA designs.
Education
Master's Degree in Physics, Electrical/Computer Engineering, or related field; OR Bachelor's Degree in those fields; OR equivalent experience.
Visa sponsorship
Requires proof of country of citizenship, U.S. permanent residency, or other protected status for export-control eligibility; citizenship or status is verified with a valid passport or other applicable documents.

About the job

Designs and delivers FPGA-based, low-latency digital subsystems for a topological quantum computer, including readout, error decoding, interconnects, and clocking.

What you'll do

  • Design and implement streaming RTL pipelines and high-speed subsystem interconnects.
  • Develop clocking and CDC strategies; verify designs and perform lab bring-up and debugging.
  • Own FPGA implementation and timing sign-off, scripted builds and CI, and hardware/software interface design.

What they ask for

  • Master's Degree in Physics, Electrical/Computer Engineering, or related field and 1+ years of industry or research and development experience; OR Bachelor's Degree in those fields and 2+ years of such experience; OR equivalent experience.
  • Provide proof of citizenship, U.S. permanent residency, or other protected status to establish eligibility for access to export-controlled information.
  • Meet required security screening, including the Microsoft Cloud Background Check.

Nice to have

  • Production FPGA design experience with Verilog/SystemVerilog or VHDL, including synthesis, place and route, and static timing analysis.
  • Experience with streaming low-latency datapaths, high-speed I/O, clocking/CDC, verification, and lab debugging.

Pay

USD $102,100 - $202,200 per year (base salary); USD $133,800 - $219,200 per year (base salary)

Tools

Verilog/SystemVerilog, VHDL, AXI4/AXI-Stream, JESD204(B/C), Aurora, Ethernet/UDP, PCIe, Vivado/Vitis

AI focus

Use modern AI tools to accelerate hardware development; familiarity with building AI agents/copilots for experiment setup, log triage, measurement reports, protocol templating, and knowledge retrieval.

Model-written summary · the original posting is authoritative

First seen Oct 15, 2026 · Last verified Nov 5, 2026 (UTC)