Microsoft
Senior FPGA/Silicon Design Engineer
$120K–$261K
Redmond, WA +1 · On-site · Senior · Full-time · Posted Oct 13, 2026
- Location
- Redmond, WA
Mountain View, CA - Experience
- 1+ year with a doctorate, 4+ years with a master’s degree, or 5+ years with a bachelor’s degree; alternatively, equivalent experience. Preferred experience includes 4+ years in digital logic design and tools, and 5+ years of FPGA and RTL design.
- Education
- Doctorate, master’s, or bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field; or equivalent experience.
About the job
Develops custom IP and FPGA solutions for Azure Cobalt, from prototyping and RTL design through verification, optimization, and validation.
What you'll do
- Lead FPGA design environment work for rapid IP prototyping, validation, and complex system root-cause analysis.
- Develop custom IP RTL from microarchitecture through implementation, verification, and post-silicon validation; optimize performance, power, and area.
- Lead design signoff and collaborate across teams; mentor engineers and improve design methods.
What they ask for
- Doctorate in a related field and 1+ year of technical engineering experience, or a master’s degree and 4+ years, or a bachelor’s degree and 5+ years, or equivalent experience.
- Meet Microsoft Cloud Background Check requirements, including passing the check upon hire or transfer and every two years thereafter.
- Provide citizenship, U.S. residency, or other protected-status documentation for export-control eligibility assessment.
Nice to have
- Experience with digital logic design, FPGA/RTL design, and synthesis or static-check tools.
- Experience with Xilinx FPGA boards and tooling, ChipWhisperer or similar FPGA power analysis tools, and test automation.
Pay
USD $119,800 - $234,700 per year (base salary); USD $160,200 - $261,000 per year (base salary)
Tools
FPGA, RTL, SystemVerilog, Verilog, VHDL, Python, Xilinx FPGA, ChipWhisperer
Model-written summary · the original posting is authoritative