Microsoft
Senior SoC HW Analog/Functional Validation Engineer
$120K–$261K
Hillsboro, OR · On-site · Senior · Full-time · Posted Nov 3, 2026
- Experience
- Required: Doctorate and 1+ year(s), or Master's Degree and 4+ years, or Bachelor's Degree and 5+ years of technical engineering experience, or equivalent experience. Preferred: Doctorate and 3+ years, or Master's Degree and 6+ years, or Bachelor's Degree and 8+ years of technical engineering experience, or equivalent experience.
- Education
- Doctorate, Master's Degree, or Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field; or equivalent experience.
About the job
Owns post-silicon validation of SoC analog or functional interfaces, developing validation plans and tools, executing tests, and debugging silicon failures.
What you'll do
- Lead post-silicon validation for PLL, IO electrical/analog, or functional IO interfaces; develop and execute test plans and validation content.
- Define and implement silicon debug tools and capabilities; triage and debug failures and improve validation methods with partners.
- Provide technical guidance and mentorship, and collaborate with design, verification, and other engineering teams.
What they ask for
- Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field and 1+ year(s) technical engineering experience, or Master's Degree in one of these fields and 4+ years, or Bachelor's Degree in one of these fields and 5+ years, or equivalent experience.
- Ability to meet Microsoft, customer and/or government security screening requirements, including the Microsoft Cloud Background Check.
- Provide proof of citizenship, U.S. residency, or other protected status to assess eligibility for access to export-controlled information; citizenship will be verified with a valid passport, with other documents applicable to lawful permanent residents, refugees, and asylees.
Nice to have
- Applied understanding of computer architecture and CPU/SoC validation, including subsystem, system, and platform functionality and scripting in Python or C/C++.
- Validation, verification, logic development, or analog validation experience in CPU, SoC, or IP development; experience with silicon debug, board schematics, software/firmware, or pre-silicon platforms.
Pay
USD $119,800 - $234,700 per year (base salary); USD $160,200 - $261,000 per year (base salary)
Tools
PLL, PCI, CXL, Python, C/C++, FPGA, JTAG
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