Mythic
Compiler Engineer - Algorithmic Workloads Compilation
Palo Alto, CA +3 · Remote · Full-time · Posted Oct 3, 2025
- Location
- Palo Alto, CA
Austin, TX
Vancouver, BC
Remote - Experience
- 3+ years of professional experience in compilers or high-performance systems software.
About the job
Design compiler support for algorithmic workloads with irregular or dynamic control flow on Mythic’s analog and digital accelerator subsystems.
What you'll do
- Extend compiler IRs and develop strategies for control flow, iterative computation, and unified analog/digital compilation.
- Prototype and optimize algorithms using techniques such as vectorization, predication, and scheduling.
- Collaborate with hardware engineers on ISA and execution-model co-design, and define higher-level programming abstractions.
What they ask for
- Proficiency in modern C++ (C++14/17/20) and Python.
- Familiarity with compiler IRs such as MLIR or LLVM, or equivalent.
- Foundation in program analysis and optimization, including SSA form, loop optimizations, and vectorization.
Nice to have
- Hands-on experience developing MLIR or LLVM dialects for control flow, or affine/polyhedral representations.
- Compiler-hardware co-design experience, or experience extending ML compiler stacks to support workloads beyond DNNs.
Tools
C++14/17/20, Python, MLIR, LLVM, ONNX, IREE, XLA, PyTorch
AI focus
Enable algorithmic and control-flow-heavy workloads, beyond static neural networks, to run on analog and digital accelerator hardware.
Model-written summary · the original posting is authoritative