Neuralink
Analog IC Layout Engineer
$83K–$139K
South San Francisco, California, United States +1 · Full-time · Posted Apr 28, 2026
- Location
- South San Francisco, California, United States
Fremont, California, United States - Experience
- 2+ years in analog and mixed-signal IC layout design; 1+ year with FinFET technologies.
- Education
- Bachelor of Science in Computer Engineering or related field.
About the job
Designs and verifies analog and mixed-signal IC layouts for neural recording and stimulation system-on-chips used in brain-computer interfaces.
What you'll do
- Create layouts for analog and mixed-signal circuits, including amplifiers, filters, switched capacitor circuits, oscillators, data converters, and power management circuits.
- Review layout floorplans and analyze high-fidelity circuits with circuit engineers.
- Perform physical verification of custom IC mask layouts (LVS, DRC, ERC).
What they ask for
- Bachelor of Science in Computer Engineering or related field.
- 2+ years of experience in analog and mixed-signal IC layout design.
- 1+ year experience with FinFET technologies.
- Ability to identify the best approach to solving problems.
Nice to have
- Programming/scripting knowledge in SKILL, TCL, Shell, C/C++, and/or Python.
- Experience with analog DFM standards, layout P-cell design and implementation, or layout automation.
Pay
$83,000 — $139,000 USD (base salary)
Tools
FinFET, LVS, DRC, ERC, SKILL, TCL, Shell, Python
Model-written summary · the original posting is authoritative