Drimva

Neuralink

Digital Verification Engineer

$131K–$243K

South San Francisco, California, United States · Full-time · Posted Aug 4, 2026

Experience
Minimum 3 years of experience in digital ASIC verification.
Education
Bachelor's degree in a technical field OR equivalent experience.

About the job

Verifies digital ASIC designs for SoC modules focused on high-throughput, low-power digital signal processing for brain-computer interfaces.

What you'll do

  • Verify digital ASIC and SoC designs, including setting up code coverage and regression flows.
  • Develop automation flows and scripts for verification.
  • Contribute to architecture and logic implementation of digital modules.

What they ask for

  • At least 3 years of experience in digital ASIC verification.
  • Excellence in SystemVerilog.
  • Experience developing automation flows and scripts, such as Python, Perl, Makefile, Tcl, and UNIX shell.
  • Experience with code coverage and regression setup.

Nice to have

  • Experience with complex SoC verification, including test benches and debugging; formal verification or UVM experience is also listed.
  • Experience with low-power verification, FPGA/emulation, or ARM/RISC-V processors and AMBA bus.

Pay

$131,000 — $243,000 USD base salary

Tools

SystemVerilog, Python, Perl, Makefile, Tcl, UNIX shell, SystemC/C++, UVM

Model-written summary · the original posting is authoritative

First seen Oct 27, 2026 · Last verified Nov 5, 2026 (UTC)