Neurophos
Physical Design / Implementation Lead
$225K–$300K
Austin, Texas +1 · On-site · Full-time · Posted Sep 3, 2026
- Location
- Austin, Texas
Sunnyvale, California
About the job
Leads the physical design and implementation process for digital subsystems and SoCs, from synthesis through tapeout, while building the team and implementation flows.
What you'll do
- Own end-to-end physical design, including synthesis, timing closure, power and clock architecture, physical verification, and IP/library management.
- Automate implementation flows, integrate new process technologies and analog/mixed-signal components, and coordinate across engineering teams.
- Hire, grow, and manage the physical design team.
What they ask for
- Led physical design or implementation of large, complex SoCs through tapeout, or equivalent senior-level ownership across implementation disciplines.
- Hands-on FinFET-class experience at 7nm–3nm.
- Deep power and clock design experience at scale.
- Track record of leading and growing a team.
Nice to have
- TSMC N3 experience.
- Experience integrating analog/mixed-signal blocks into a digital implementation flow; Cadence toolchain experience.
Pay
$225K – $300K (base salary)
Tools
TSMC N3, FinFET, GAA, Cadence
Model-written summary · the original posting is authoritative