Neurophos
Staff Technical Program Manager, ASIC
$180K–$215K
Austin, Texas · On-site · Staff · Full-time · Posted Sep 10, 2026
- Experience
- 10+ years; at least 2 complete silicon programs, including at least 1 carried through post-silicon bring-up to production or system integration.
- Education
- BS in Electrical/Computer Engineering or equivalent (MS preferred).
About the job
Leads the end-to-end Electronic IC (EIC) ASIC program from architecture and design through tapeout, silicon bring-up, and system integration, while establishing AI-augmented program workflows.
What you'll do
- Manage the integrated schedule, dependencies, staffing outlook, risks, and program reviews across internal teams and external partners.
- Drive specification convergence, design and verification execution, tapeout readiness, foundry coordination, and post-silicon bring-up.
- Deploy AI/LLM tools across program management and partner with engineering teams on AI-assisted design, verification, and debug workflows.
What they ask for
- 10+ years in ASIC/SoC development as a TPM/EPM or equivalent lead on complex silicon programs.
- At least 2 complete silicon programs from architecture/specification through tapeout; at least 1 through post-silicon bring-up to production or system integration.
- Working fluency across the silicon lifecycle and direct experience managing foundry, IP vendor, OSAT, and design-services relationships.
- BS in Electrical/Computer Engineering or equivalent; fluent daily use of AI tools in program work.
Nice to have
- MS degree.
- Mixed-signal/high-speed analog or silicon photonics exposure; advanced packaging; first-silicon/startup; prior hands-on design, DV, or physical design; or AI-assisted EDA/verification experience.
Pay
$180K – $215K USD base salary
Tools
ASIC/SoC, RTL, DV, FPGA/emulation, DFT, Jira, EDA, AI/LLM tooling
AI focus
Drive AI-augmented program workflows and adoption of AI-assisted design, verification, and debug-triage tooling.
Model-written summary · the original posting is authoritative