Nexthop AI
Senior Signal Integrity Engineer
Santa Clara, California · On-site · Senior · Full-time · Posted Sep 24, 2026
- Experience
- 10-15 years of signal integrity experience on high-speed system design.
- Education
- MS or PhD in Electrical Engineering, Physics, or a related field (BS with equivalent depth considered).
About the job
Own end-to-end signal integrity for next-generation switch platforms, from channel feasibility and design sign-off through lab bring-up and link debugging.
What you'll do
- Set channel targets and loss budgets, and lead interconnect, stackup, and material decisions with design teams and PCB vendors.
- Run simulation, compliance analysis, and measurement correlation; debug link performance through EVT and DVT.
- Improve SI methods and design rules, automate analysis in Python, and mentor engineers.
What they ask for
- MS or PhD in Electrical Engineering, Physics, or a related field; BS with equivalent depth considered.
- Proven ownership of signal integrity for complex boards through production, ideally high-pin-count, high-power ASIC designs at 50G/lane or above.
- Expertise in 3D EM simulation and extraction, including correlation to measurement; command of S-parameters, mode conversion, crosstalk, and time-domain analysis.
- Experience with high-speed Ethernet link budgeting and compliance, PCB stackup and fabrication, and Python automation.
Nice to have
- 224G PAM4 or 200G-per-lane channel design experience; participation in IEEE 802.3 or OIF standards work.
- Experience with cabled or optical module ecosystems, power integrity or EMC, or building an SI methodology or team.
Tools
HFSS, SIwave, Sigrity, ADS, Python, COM, ERL, IEEE 802.3dj
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