CPU Custom Memory Design - SRAMs and Register Files

What you'll do

• Develop and characterize custom memories and supervise layout, physical verification, and PPA closure.
• Own memory IP signoff, including DRC/LVS/antenna, extraction, SPICE margins, STA, and timing, power, and noise characterization.
• Collaborate with foundry, CAD, physical design, RTL, and DFT teams on technology validation, memory specifications, and design flows.

What they ask for

• BS or MS degree and 8+ years of custom memory circuit design experience in SRAMs and/or register files.
• Hands-on transistor-level circuit design experience with logic, memory arrays, and advanced CMOS nodes; deep knowledge of SPICE simulations and memory circuit margins.
• Proficiency with industry-standard EDA tools for custom memory schematic, layout, extraction, and characterization.
• Track record delivering production-level custom memory IP through tape-out with silicon-validated PPA; knowledge of end-to-end memory signoff and Liberty/CCS model development.

Nice to have

• Experience with embedded memory design flows, complex memory sub-blocks, PPA analysis, and macro verification.
• Foundry PDK bring-up or DTCO experience; Python, Perl, or TCL automation; experience using Agentic AI tools.

Pay

USD 140,000–200,000 per year; base salary

Tools

SPICE, DRC/LVS, STA, Liberty/CCS, Python, Perl, TCL

AI focus

Experience using Agentic AI tools for productivity and automation is preferred.