Drimva

NUVACORE

CPU Design & Verification Engineer — New College Grad

$140K–$200K

Austin, TX +2 · Hybrid · Entry level · Full-time · Posted Sep 30, 2026

Location
Austin, TX
Santa Clara, CA
United States
Experience
Recent or upcoming graduate; no number of years specified.
Education
BS or MS in Electrical/Computer Engineering, Computer Science, or equivalent practical experience.

About the job

Contribute to the design or verification of a general-purpose CPU core for AI infrastructure, working across CPU architecture, RTL, and verification teams.

What you'll do

  • Develop and debug CPU verification plans, tests, environments, checkers, and coverage, or contribute to RTL and micro-architecture design.
  • Help analyze performance and correlate RTL with performance models; identify design issues and support failure root-cause analysis.
  • Collaborate with architecture, verification, and physical design teams on simulation, emulation, bring-up, and CPU goals.

What they ask for

  • BS or MS in Electrical/Computer Engineering, Computer Science, or equivalent practical experience; recent or upcoming graduate.
  • Coursework or project experience in digital logic and computer architecture, and strong CPU micro-architecture fundamentals.
  • Proficiency in C/C++, SystemVerilog, and/or Verilog, plus familiarity with a scripting language.
  • Exposure through coursework, internships, or projects to functional verification concepts or RTL design/coding.

Nice to have

  • Internship or project experience in CPU or complex digital design, verification, or RTL development.
  • Exposure to RISC-V, ARM64, or x86 ISA; assembly programming; constrained-random verification; formal verification; emulation/FPGA; or silicon bring-up.

Pay

USD 140,000–200,000 per-year-salary; base salary not specified

Tools

C/C++, SystemVerilog, Verilog, Python, Perl, RISC-V, ARM64, x86

AI focus

Designing and verifying a general-purpose CPU core for AI infrastructure and agentic computing.

Model-written summary · the original posting is authoritative

First seen Oct 29, 2026 · Last verified Nov 5, 2026 (UTC)