NUVACORE
CPU Fabric and Interconnect Verification Engineer
$140K–$250K
Bangalore +2 · Hybrid · Full-time · Posted Sep 18, 2026
- Location
- Bangalore
Austin, TX
Santa Clara, CA - Experience
- 15+ years for Principal or 4+ years for Senior Engineer; design-verification experience, ideally on a CPU or complex digital design.
- Education
- Degree in Electrical/Computer Engineering, Computer Science, or equivalent practical experience.
About the job
Verifies NUVACORE’s coherent and non-coherent CPU interconnect fabric by developing test plans, environments, checkers, and coverage to find functional and performance issues before and during hardware bring-up.
What you'll do
- Plan verification strategy and build test environments for the interconnect fabric, including crossbars, routing, and bus interfaces.
- Create directed and random traffic, debug protocol and performance issues, and close functional coverage.
- Collaborate with architecture and RTL teams on root-cause analysis, design fixes, emulation, FPGA, and silicon bring-up.
What they ask for
- Degree in Electrical/Computer Engineering, Computer Science, or equivalent practical experience.
- Design-verification experience: 15+ years for Principal or 4+ years for Senior Engineer.
- Knowledge of interconnect/fabric architecture, digital logic, and coherent and non-coherent protocols.
- Hands-on functional verification experience; proficiency in C/C++ and/or SystemVerilog, plus a scripting language.
Nice to have
- Interconnect, network-on-chip (NoC), or fabric verification; bus-protocol verification.
- Formal verification, constrained-random verification, performance/QoS verification, or emulation/FPGA and silicon bring-up.
Pay
USD 140,000–250,000 (per-year-salary)
Tools
AMBA, CHI, TileLink, C/C++, SystemVerilog, Python, Perl
AI focus
Verifies a CPU core designed for AI infrastructure and agentic computing; no specific AI development work is stated.
Model-written summary · the original posting is authoritative