NUVACORE
CPU Static Timing Analysis (STA)
$140K–$250K
Austin, TX +1 · Hybrid · Full-time · Posted Sep 21, 2026
- Location
- Austin, TX
Santa Clara, CA - Experience
- 5+ years for Individual Contributor roles or 12+ years for Lead roles in static timing analysis on high-speed designs.
- Education
- BS or MS degree.
About the job
Performs static timing and noise analysis for CPU designs, supports violation resolution and ECOs, and develops timing-analysis and design-closure methodologies.
What you'll do
- Run timing and noise analyses, verify run quality and coverage, and roll up results.
- Work with design teams to resolve violations through fixing strategies and constraint refinements; generate ECOs as needed.
- Develop timing-analysis and design-closure methodologies and provide CAD teams with feedback on tools and flows.
What they ask for
- BS or MS degree.
- 5+ years of experience for Individual Contributor roles, or 12+ years for Lead roles, in static timing analysis on high-speed designs.
- Knowledge of industry-standard EDA tools and scripting languages.
- Understanding of timing and noise analysis checks and corresponding constraints.
Nice to have
- Experience in CPU unit-level timing and noise analysis; understanding of timing noise models, hierarchical analysis strategies, advanced technologies, and scaling trends.
- Knowledge of physical design flows and methodology; proficiency in Python, Perl, or TCL; experience using Agentic AI tools for productivity and automation.
Pay
USD 140,000–250,000 per-year-salary (base salary)
Tools
EDA tools, Python, Perl, TCL
AI focus
Experience using Agentic AI tools for productivity and automation is preferred.
Model-written summary · the original posting is authoritative