NVIDIA
ASIC Design Engineer - New College Grad 2026
$100K–$190K
US, CA, Santa Clara · Full-time · Posted Jul 9, 2026
- Education
- Bachelors Degree or equivalent experience in Electrical Engineering, Computer Engineering or Computer Science.
About the job
Implements and verifies high-performance, power- and area-efficient RTL for GPU and SoC designs, from microarchitecture through timing-clean delivery.
What you'll do
- Analyze architectural trade-offs and develop microarchitecture and RTL for ASIC designs.
- Deliver fully verified designs that meet synthesis and timing targets, coordinating with architecture, verification, synthesis, timing, and backend teams.
- Develop silicon-debug features and support post-silicon validation.
What they ask for
- Bachelor’s Degree or equivalent experience in Electrical Engineering, Computer Engineering, or Computer Science.
- Experience in micro-architecture and RTL development (Verilog).
- Understanding of ASIC design flow, including RTL design, verification, logic synthesis, and timing analysis.
- Exposure to digital systems, VLSI design, computer architecture, and computer arithmetic.
Nice to have
- Strong C/C++, Python or Perl skills.
- Experience with arbiters, scheduling, synchronization, bus protocols, interconnect networks, or caches.
Pay
100,000 USD - 166,750 USD (base salary, Level 1); 116,000 USD - 189,750 USD (base salary, Level 2)
Tools
Verilog, C/C++, Python, Perl
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