NVIDIA
ASIC Design Verification Engineer - New College Grad 2026
$116K–$218K
US, TX, Austin · Full-time · Posted Jan 9, 2026
- Education
- MS or higher in Computer or Electrical Engineering (or equivalent experience).
About the job
Verifies and improves system-level IP RTL by developing verification environments, tests, and methodologies across unit, subsystem, and SoC levels.
What you'll do
- Build and maintain unit-level and subsystem verification environments; develop test plans and UVM components, sequences, tests, and scoreboards.
- Run regression tests, debug issues, track verification milestones, and automate build, regression, and triage workflows.
- Collaborate with architects, designers, and software engineers to improve testbench efficiency and achieve project goals.
What they ask for
- Completing an MS or higher in Computer or Electrical Engineering (or equivalent experience).
- Experience in System Verilog, UVM, and object-oriented programming.
- Strong coding skills in Python or other industry-standard scripting languages; strong understanding of RTL design (Verilog).
- Good understanding of computer architecture fundamentals.
Nice to have
- Familiarity with VCS or equivalent simulation tools and debug tools like Verdi.
Pay
116,000 USD - 189,750 USD (base salary, Level 2); 136,000 USD - 218,500 USD (base salary, Level 3)
Tools
System Verilog, UVM, Python, Verilog, VCS, Verdi
Model-written summary · the original posting is authoritative