NVIDIA
ASIC Verification Engineer
$116K–$190K
US, TX, Austin · Full-time · Posted Oct 8, 2026
- Experience
- 2+ years of proven design verification experience.
- Education
- BS/MS in Electrical or Computer Engineering (or equivalent experience).
About the job
Verifies generated RTL and global IP across multiple products, driving functional and performance coverage closure in collaboration with design and architecture teams.
What you'll do
- Develop test plans, tests, and verification infrastructure; automate flows for building, deploying, and verifying generated RTL.
- Build SV/UVM verification components, maintain regressions, and ensure code and functional coverage.
- Collaborate with design teams to identify corner cases, resolve verification issues, and drive coverage-based sign-off.
What they ask for
- BS/MS in Electrical or Computer Engineering, or equivalent experience.
- 2+ years of proven design verification experience.
- Experience in pre-silicon verification (UVM, SystemVerilog), ASIC design/implementation flow, and design automation.
- Programming and scripting experience in Perl or Python.
Nice to have
- Previous experience automating design verification tasks; hands-on object-oriented programming experience.
- Prior IP or block-level design or verification experience, or experience developing methodologies used by others.
Pay
116,000 USD - 189,750 USD (base salary)
Tools
UVM, SystemVerilog, Perl, Python, dc_shell, VCS, Debussy, GDB
Model-written summary · the original posting is authoritative