NVIDIA
ASIC Verification Engineer
$116K–$218K
US, CA, Santa Clara · Full-time · Posted Oct 5, 2026
- Experience
- 3+ years of proven design verification experience
- Education
- BS or MS in EE/ECE or equivalent experience
About the job
Validates clocking and reset logic for Tegra and GPU products, from test planning and automation through execution, coverage, bug resolution, and productization.
What you'll do
- Own end-to-end validation of clocking structures, including test plans, validation flows, coverage, test execution, and bug identification/fixes.
- Develop scalable verification solutions and use industry-standard methodologies and tools.
- Partner with clock architecture and design teams and coordinate across internal and external groups.
What they ask for
- BS or MS in EE/ECE or equivalent experience
- 3+ years of proven design verification experience
- Good understanding of Logic Design and Architecture; expertise in verification flows including SV constraint random verification, UVM, Formal Verification, coverage metrics, profiling tools, and X prop
- Strong coding skills in System Verilog, scripting languages (Perl/python), and C++; experience with block- and system-level verification and pre-silicon test plans
Nice to have
- Experience automating design verification tasks and object-oriented programming
- Prior IP or block-level design/verification experience; experience developing methodologies used by others and driving projects to completion
Pay
116,000 USD - 189,750 USD base salary (Level 2); 136,000 USD - 218,500 USD base salary (Level 3)
Tools
System Verilog, UVM, C++, Perl, Python, NVIDIA custom compilers and tools
Model-written summary · the original posting is authoritative