ASIC Verification Engineer, Memory Management - New College Grad 2027

What you'll do

• Understand MMU design and implementation; develop testbenches, BFMs, checkers, and monitors.
• Implement test and coverage plans and verify design correctness.
• Collaborate across teams and contribute to testbench methodology direction.

What they ask for

• Pursuing or recently completed a BS or MS in Electrical Engineering, Computer Science, Computer Engineering, or a related field, or equivalent experience.
• Exposure to computer architecture, ASIC design, and verification methodology.
• Strong proficiency with SystemVerilog, C and/or C++, test planning, coverage closure, and reusable verification components.
• Knowledge of constrained-random testing, functional coverage, assertion-based verification, and object-oriented programming concepts.

Nice to have

• Understanding of memory subsystem micro-architecture, cache topologies and policies, memory management, interconnects, or arbiter designs; exposure to UVM, checkers and scoreboards, SFV, Perl, or Python.
• Exposure to simulation tools such as VCS and IES, and debug tools such as Debussy and GDB.

Pay

100,000 USD - 166,750 USD base salary; 116,000 USD - 189,750 USD base salary

Tools

SystemVerilog, C, C++, VCS, IES, Debussy, GDB, UVM