NVIDIA
Formal Verification Engineer - New College Grad 2027
$100K–$190K
US, CA, Santa Clara · Entry level · Full-time · Posted Oct 27, 2026
- Education
- BS or MS in CS/CE/EE/Mathematics or equivalent experience.
About the job
Own formal verification of RTL units for next-generation chip designs, developing verification plans and environments, proving design correctness, and debugging failures.
What you'll do
- Develop formal verification test plans, identify key behaviors, and create verification plans.
- Build verification environments with assumptions, assertions, and cover properties; apply formal verification techniques and debug RTL failures.
- Automate verification with scripts and review formal setups and proofs with design and verification teams.
What they ask for
- Knowledge or experience in formal verification techniques.
- Strong knowledge of CPU/GPU architectures and digital logic; understanding of abstraction techniques and temporal logic assertions.
- Hands-on experience with HDLs such as Verilog / System Verilog, and ability to understand RTL quickly.
- Strong analytical skills and ability to collaborate effectively.
Nice to have
- Experience with Formal Verification Tools such as Jasper, IFV, SMV, or SPIN.
Pay
100,000 USD - 166,750 USD base salary (Level 1); 116,000 USD - 189,750 USD base salary (Level 2)
Tools
Verilog, System Verilog, Jasper, IFV, SMV, SPIN
Model-written summary · the original posting is authoritative