NVIDIA
Lead Hardware Design Validation Engineer - Memory Subsystem
$168K–$322K
US, CA, Santa Clara · Full-time · Posted Jul 9, 2026
- Experience
- 10+ years of relevant hands-on experience in high-speed DRAM design and test.
- Education
- Master’s degree or higher in Electrical Engineering, or equivalent experience.
About the job
Leads HBM/GDDR memory enablement, validation, and failure analysis from first silicon power-on through production for datacenter and graphics products.
What you'll do
- Develop characterization, validation, and test plans for each memory generation, incorporating memory partners’ design limits and test methods.
- Work with memory partners and cross-functional hardware and software teams to bring memory into production.
- Guide memory-subsystem product decisions across ASIC, VLSI, board, and ATE.
What they ask for
- Master’s degree or higher in Electrical Engineering, or equivalent experience.
- 10+ years of relevant hands-on experience in high-speed DRAM design and test.
- Broad understanding of ASIC design, mixed-signal design, and power and signal integrity.
- Working knowledge of Linux, scripting, programming, computer systems, and data analysis methods.
Pay
168,000 USD - 258,750 USD base salary; 200,000 USD - 322,000 USD base salary
Tools
HBM, GDDR, ASIC, VLSI, ATE, Linux
Model-written summary · the original posting is authoritative