NVIDIA
Mask Design Engineer – Hardware
$108K–$184K
US, CA, Santa Clara +5 · Full-time · Posted Oct 13, 2026
- Location
- US, CA, Santa Clara
US, NV, Remote
US, OR, Remote
US, AZ, Remote
US, WA, Remote
US, CA, Remote - Experience
- 3+ years in Mask and Layout Design.
- Education
- B.S. Electrical Engineering or equivalent experience.
About the job
Design and verify silicon interposer layouts for NVIDIA product packages, coordinating with engineering teams on feasibility, schedules, cost, manufacturing, and electrical design issues.
What you'll do
- Perform silicon interposer physical layout using Cadence tools; conduct custom layout and verification against design rules and netlists.
- Evaluate package design feasibility for size, cost, and system performance, and propose layout trade-offs to the package technical lead.
- Collaborate with package, signal-integrity, and technology teams to deliver package solutions on tight schedules.
What they ask for
- B.S. in Electrical Engineering or equivalent experience.
- 3+ years of experience in Mask and Layout Design.
- Deep understanding of layout concepts in submicron CMOS technologies and proficiency with Cadence layout tools, particularly Virtuoso.
- Experience with verification tools and scripting languages; knowledge of DRC and LVS flows and ability to customize decks.
Nice to have
- Knowledge of Integrity auto-routing.
- Knowledge of APD package layout tool; understanding of packaging technology is useful.
Pay
108,000 USD - 184,000 USD (base salary)
Tools
Cadence, Virtuoso, Integrity, Calibre, ICV, Thunder, Perl, Python
AI focus
NVIDIA uses AI tools in its recruiting processes; the role's engineering work does not state AI responsibilities.
Model-written summary · the original posting is authoritative