NVIDIA
Physical Design Engineer, Synthesis and Implementation
$116K–$218K
US, MA, Westford · Full-time · Posted Oct 2, 2026
- Experience
- 2+ years of experience in synthesis and physical implementation on advanced process nodes.
- Education
- BSEE, MSEE, or equivalent experience.
About the job
Develop and optimize synthesis and physical implementation for complex digital blocks in networking silicon, meeting performance, power, and area targets.
What you'll do
- Own RTL-to-gate synthesis and QoR convergence for complex digital blocks and hierarchical partitions.
- Optimize synthesis strategies, constraints, and flows; analyze bottlenecks and QoR regressions with partner teams.
- Support physical implementation through routing and timing closure, and automate design workflows and reporting.
What they ask for
- BSEE, MSEE, or equivalent experience.
- Strong proficiency with Synopsys Fusion Compiler, Cadence Genus, or comparable synthesis tools.
- Hands-on experience with synthesis constraints, timing analysis, QoR optimization, and full place-and-route flow.
- Proficiency in Python, Perl, Tcl, and Make.
Pay
116,000 USD - 189,750 USD base salary (Level 2); 136,000 USD - 218,500 USD base salary (Level 3)
Tools
Synopsys Fusion Compiler, Cadence Genus, Python, Perl, Tcl, Make
Model-written summary · the original posting is authoritative