NVIDIA
Post-Silicon Validation and Methodology Engineer
$136K–$218K
US, CA, Santa Clara · Full-time · Posted Oct 13, 2026
- Experience
- 5+ years in silicon bring-up, validation, debug, or productization.
- Education
- BS or MS in Electrical or Computer Engineering (or equivalent experience).
About the job
Build and improve post-silicon bring-up, validation, test infrastructure, and AI-assisted lab workflows for next-generation silicon from first power-on through PVT sign-off.
What you'll do
- Own bring-up, validation, qualification, tuning, and productization plans; drive power-management and clocking coverage from pre-silicon through production.
- Build test infrastructure, characterization methods, bring-up playbooks, and AI-assisted tools for telemetry analysis, anomaly detection, and debug triage.
- Lead root-cause analysis of hardware/software issues and redesign lab workflows, regression frameworks, and metrics.
What they ask for
- BS or MS in Electrical or Computer Engineering, or equivalent experience.
- Deep fundamentals in digital development, microarchitecture, timing, clocking, power, noise, and control systems.
- Hands-on proficiency with oscilloscopes, logic analyzers, and power analyzers.
- Strong Python and C/C++ programming and scripting; experience building lab automation or test infrastructure.
Nice to have
- GPU/SoC bring-up experience.
- Experience with production-silicon in-system test or DFT features, fault models, DPPM, and RAS.
Pay
136,000 USD - 218,500 USD (base salary)
Tools
Python, C/C++
AI focus
Build and use AI-assisted lab workflows for bring-up telemetry and measurement-data analysis, anomaly detection on regression results, and debug triage; demonstrate validation of tool trustworthiness and judgment about when measurement must remain manual.
Model-written summary · the original posting is authoritative