Principal Chip Lead, Silicon Co-Design Group

What you'll do

• Serve as the technical point of contact for program decisions, issues, and trade-offs; guide feature integration across chip and system.
• Drive resolution of complex multi-functional silicon bugs and steward the qualification playbook, including reusable mitigations and methodology.
• Lead technical execution forums, communicate risks and options to executives, and mentor Chip Leads.

What they ask for

• BS or MS (or equivalent experience) in Electrical or Computer Engineering.
• Over a decade of proven post-silicon bring-up, validation, or system integration leadership at a major semiconductor company, including multiple shipped silicon products.
• 15+ years of experience.
• End-to-end understanding of SoC and ASIC architecture, with recognized expertise in at least one subsystem such as HBM, SerDes, power and thermal, or packaging.

Nice to have

• Prior Chip Lead, Project Tech Lead, or Principal or Distinguished Engineer experience on a flagship GPU, AI accelerator, CPU, networking ASIC, or other large SoC; relevant patents, papers, talks, or recognized contributions.
• Experience building reusable technical methodology; hands-on debug with HBM, high-speed I/O, power and thermal, or packaging; using AI tools to improve team velocity.

Pay

232,000 USD - 368,000 USD (base salary)

Tools

HBM, SerDes, SoC, ASIC, GPU, AI accelerator, CPU, networking ASIC

AI focus

Bonus for using AI tools to lift team velocity. NVIDIA also uses AI tools in its recruiting processes.