NVIDIA
Senior ASIC Design Engineer
$136K–$264K
US, CA, Santa Clara +1 · Senior · Full-time · Posted Oct 7, 2026
- Location
- US, CA, Santa Clara
US, CA, Remote - Experience
- 5+ years; ASIC design experience or SOC integration design / flow experience.
- Education
- BS / MS in Microelectronics/ Electronic Engineering/ Computer Science and related (or equivalent experience).
About the job
Design and integrate RTL and system-level modules for GPU and SoC products, including synthesis, timing analysis, and silicon bring-up support.
What you'll do
- Design, synthesize, and analyze the timing of system-level modules and improve RTL and SoC designs.
- Collaborate with architecture, design, and verification teams on modules such as Floorsweep, in-silicon measurement, and Reset and Boot controllers.
- Integrate modules into SoC designs, support silicon bring-up, and improve design flows and methodologies.
What they ask for
- BS / MS in Microelectronics/ Electronic Engineering/ Computer Science and related (or equivalent experience).
- 5+ years of ASIC design experience or SOC integration design / flow experience.
- Fundamental digital design concepts and experience in ASIC design flow, including RTL design, verification, logic synthesis and timing analysis.
- Strong coding skills in Perl, Python, C++, or other industry-standard scripting languages; basic understanding of verification methodology.
Nice to have
- Familiarity with ARM CPU and SoC system architecture and microprocessor and microcontroller fundamentals.
- Experience with reset controllers, boot, fuse controllers or UCIe protocol; hands-on programming and scripting experience.
Pay
136,000 USD - 218,500 USD base salary (Level 3); 168,000 USD - 264,500 USD base salary (Level 4)
Tools
RTL, SOC, Perl, Python, C++, ARM, UCIe
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