NVIDIA
Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU
$136K–$264K
US, CA, Santa Clara +4 · Senior · Full-time · Posted Aug 13, 2026
- Location
- US, CA, Santa Clara
US, MA, Westford
US, TX, Austin
US, NC, Durham
US, CA, Remote - Experience
- 5+ years of relevant industry experience.
- Education
- BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience.
About the job
Build and improve infrastructure, automation, and tools for integrating, qualifying, and verifying high-speed IO ASIC IP across products.
What you'll do
- Develop integration, build, simulation, and pre-submit qualification flows; improve CI reliability, speed, debuggability, and scalability.
- Investigate complex failures and turn recurring issues into automation and process improvements.
- Define and use engineering metrics, collaborate across teams, and apply AI workflows to tasks such as debug, triage, and documentation.
What they ask for
- BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience.
- Strong understanding of ASIC development workflows and experience with verification methodology such as UVM or similar.
- Strong working knowledge of Verilog/SystemVerilog, including RTL development or pre-silicon verification/debug experience.
- Strong programming skills in Python, Perl, or another scripting/systems programming language.
Nice to have
- Practical experience applying AI tools to engineering workflows.
- Experience providing ASIC IP for several products, projects, or SoCs simultaneously.
Pay
136,000 USD - 218,500 USD (base salary, Level 3); 168,000 USD - 264,500 USD (base salary, Level 4)
Tools
UVM, Verilog, SystemVerilog, VCS, Verdi, Xcelium, Python, Perl
AI focus
Apply AI workflows to debug assistance, run triage, summarization, documentation, and workflow automation.
Model-written summary · the original posting is authoritative