NVIDIA
Senior ASIC Verification Engineer
$136K–$264K
US, TX, Austin · Senior · Full-time · Posted Oct 15, 2026
- Experience
- 5+ years of proven design verification experience
- Education
- BS/MS in Electrical or Computer Engineering (or equivalent experience)
About the job
Verifies global IP across multiple NVIDIA products by developing test plans, verification infrastructure, and coverage-based signoff flows.
What you'll do
- Develop test plans, tests, and verification infrastructure for global IP; build SV/UVM verification components.
- Automate flows for generated RTL, maintain regressions, and ensure code and functional coverage through closure.
- Collaborate with design and architecture teams to identify corner cases and resolve verification issues.
What they ask for
- BS/MS in Electrical or Computer Engineering, or equivalent experience
- 5+ years of design verification experience
- Pre-silicon verification (UVM, SystemVerilog), ASIC design/implementation flow, and design automation experience
- Programming and scripting experience in Perl or Python
Nice to have
- Previous experience automating design verification tasks; hands-on object-oriented programming
- IP or block-level design/verification experience, or experience developing methodologies used by others
Pay
136,000 USD - 218,500 USD base salary (Level 3); 168,000 USD - 264,500 USD base salary (Level 4)
Tools
UVM, SystemVerilog, Perl, Python, dc_shell, VCS, Debussy, GDB
AI focus
NVIDIA uses AI tools in its recruiting processes; the role includes verification work on AI-related product lines.
Model-written summary · the original posting is authoritative