NVIDIA
Senior ASIC Verification Engineer
$136K–$264K
US, CA, Santa Clara · Senior · Full-time · Posted Aug 20, 2026
- Experience
- 5+ years in ASIC verification-related fields at both IP and SoC level.
- Education
- BS or equivalent experience in Electrical Engineering, Computer Engineering, or Computer Science; advanced degrees (MS, PhD) are a plus.
About the job
Verifies NVIDIA automotive and gaming-console SoCs and backbone IP, developing verification infrastructure and applying AI-driven workflows to improve testbench generation, debugging, and coverage closure.
What you'll do
- Lead verification of ASIC designs, architecture, golden models, and micro-architecture using UVM and other methodologies.
- Define verification scope and build infrastructure to verify complex logic and support first-pass silicon success.
- Collaborate across design and pre- and post-silicon teams to drive coverage and introduce AI/LLM-driven verification workflows.
What they ask for
- BS or equivalent experience in Electrical Engineering, Computer Engineering, or Computer Science.
- 5+ years of ASIC verification-related experience at both IP and SoC level.
- Production experience building UVM testbenches from scratch and using constrained-random methodology; high proficiency in C/C++.
- Expertise in SVA, code and functional coverage, formal test-plan documentation, and scripting with Python, Perl, or TCL.
Nice to have
- Advanced UVM architecture knowledge and large-scale SoC verification experience.
- Experience using AI tools, Testbench Build flows, Makefiles, and Perforce.
Pay
136,000 USD - 218,500 USD (base salary, Level 3); 168,000 USD - 264,500 USD (base salary, Level 4)
Tools
UVM, C/C++, SVA, Python, Perl, TCL, Perforce, Makefiles
AI focus
Use AI and LLM-driven workflows to optimize testbench generation, debug productivity, and coverage closure; AI-tool experience is a plus.
Model-written summary · the original posting is authoritative