Drimva

NVIDIA

Senior ASIC Verification Engineer - HSIO

$136K–$264K

US, MA, Westford +1 · Senior · Full-time · Posted Aug 18, 2026

Location
US, MA, Westford
US, TX, Austin
Experience
5+ years of relevant experience.
Education
Bachelor’s or Master’s degree (or equivalent experience).

About the job

Verify ASIC design, architecture, golden models, and microarchitecture for High Speed I/O controllers at IP and subsystem levels.

What you'll do

  • Develop reusable bus functional models, monitors, checkers, and scoreboards using coverage-driven verification.
  • Define verification scope and develop test plans, tests, and infrastructure to verify design correctness.
  • Collaborate with architects, designers, and pre- and post-silicon verification teams.

What they ask for

  • Bachelor’s or Master’s degree (or equivalent experience).
  • Experience at unit, subsystem, or SoC level and expertise in SystemVerilog and UVM.
  • Expertise in comprehensive verification of IP or interconnect protocols.
  • Experience with random stimulus, functional coverage, assertion-based verification, and industry-standard simulation tools.

Nice to have

  • Understanding of HSIO system-level architecture, such as Ethernet or CXL.
  • Experience with Perl, Python, similar scripting or software programming languages, or AI-enabled code-assist or root-cause-analysis tools.

Pay

136,000 USD - 218,500 USD (base salary, Level 3); 168,000 USD - 264,500 USD (base salary, Level 4)

Tools

SystemVerilog, UVM, Ethernet, NVLink, USB, SATA, CXL, Perl

AI focus

The role verifies High Speed I/O controllers; AI-enabled code-assist or root-cause-analysis tools are a preferred experience. NVIDIA also states that it uses AI tools in recruiting.

Model-written summary · the original posting is authoritative

First seen Oct 15, 2026 · Last verified Nov 5, 2026 (UTC)