NVIDIA
Senior Circuit Design Engineer - Noise
$168K–$264K
US, CA, Santa Clara +1 · Senior · Full-time · Posted Aug 26, 2026
- Location
- US, CA, Santa Clara
US, CA, Remote - Experience
- 8+ years of experience.
- Education
- BSEE (or equivalent experience); MS preferred in Electrical or Computer Engineering.
About the job
Design and implement processor circuit IP for voltage and noise sensing, improving silicon correlation, timing, performance, and reliability.
What you'll do
- Design digital, semi-custom, and mixed-signal analog circuits for silicon correlation and noise mitigation.
- Perform transistor-level analysis and drive circuit IP design and physical implementation using custom and automated tools.
- Prototype patentable ideas on test chips, support product deployment, and mentor junior team members.
What they ask for
- BSEE or equivalent experience; MS preferred in Electrical or Computer Engineering.
- Good understanding of deep submicron process issues and digital circuit design techniques.
- Familiarity or experience with analog and mixed-signal block design, such as op-amps, comparators, and ADCs.
- Hands-on experience with Spice simulations, EM/IR analysis, and static timing analysis/closure.
Nice to have
- Hands-on experience designing and analyzing digital and mixed-signal voltage sensors; exposure to flash ADC design.
- Experience with RTL, logic synthesis and verification, Place and Route, DFT, scripting, automation, or leadership.
Pay
168,000 USD - 264,500 USD (base salary)
Tools
Spice, EM/IR, RTL, Perl, Tcl, Make, Place and Route, DFT
AI focus
NVIDIA states that it uses AI tools in its recruiting processes; the role itself does not specify AI work.
Model-written summary · the original posting is authoritative