NVIDIA
Senior DFT Engineer
$168K–$310K
US, CA, Santa Clara · Senior · Full-time · Posted Oct 7, 2026
- Experience
- BSEE (or equivalent experience) with 8+ years, MSEE with 5+ years of experience, or PhD with 3+yrs in DFT or related domains.
- Education
- BSEE (or equivalent experience), MSEE, or PhD.
About the job
Define and deploy DFX architectures and methodologies for test, safety diagnostics, silicon debug, and productization across NVIDIA products.
What you'll do
- Implement test access mechanisms, IO BIST, memory BIST, and scan compression; develop DFT methodologies.
- Define, prototype, and deploy DFX architectures for in-field testing, functional safety diagnostics, silicon debug, and silicon life-cycle management.
- Collaborate across engineering and operations teams to productize methodologies, workflows, and tools; mentor junior engineers.
What they ask for
- Demonstrated expertise in scan test plans, BIST for memories and IOs, fault modeling, ATPG, and fault simulation.
- Analytical skills verifying and validating test patterns and logic on complex, multi-million-gate designs using vendor tools.
- Cross-functional exposure to RTL and clocks design, STA, place-n-route, and power.
- Silicon debug and ATE bring-up experience, including pattern formats, failure processing, and test-program development.
Nice to have
- Strong programming and scripting skills in Perl, Python or Tcl.
- Excellent written and oral communication skills.
Pay
168,000 USD - 264,500 USD (base salary, Level 4); 196,000 USD - 310,500 USD (base salary, Level 5)
Tools
Perl, Python, Tcl, ATPG, ATE, STA
AI focus
The role supports DFT/DFX for NVIDIA products, including processors for deep learning; no specific AI development work is stated. NVIDIA states that it uses AI tools in its recruiting processes.
Model-written summary · the original posting is authoritative