NVIDIA
Senior Digital Design Engineer
$136K–$264K
US, CA, Santa Clara +2 · Senior · Full-time · Posted Jun 3, 2026
- Location
- US, CA, Santa Clara
US, TX, Austin
US, WA, Redmond - Experience
- 5+ years of relevant work experience.
- Education
- Bachelor's or Master's Degree, or equivalent experience, in Electrical Engineering or Computer Engineering.
About the job
Design and deliver verified, high-performance RTL blocks for NVLink Fusion-based AI infrastructure SoCs.
What you'll do
- Analyze architectural requirements and implementation trade-offs; deliver efficient RTL blocks.
- Develop microarchitecture specifications and RTL, then deliver blocks that are verified and synthesis- and timing-clean.
- Collaborate across design and integration teams, and identify, select, customize, and integrate IP solutions.
What they ask for
- Experience with high-speed connectivity protocols such as NVLink, PCI-Express, Ethernet, or UCIE.
- Track record delivering high-bandwidth datapath blocks such as data movers, protocol adaptors, network-on-chip, arbiters, or schedulers.
- Deep understanding of ASIC design flows and methodology.
Pay
136,000 USD - 218,500 USD (base salary, Level 3); 168,000 USD - 264,500 USD (base salary, Level 4)
Tools
NVLink Fusion, NVLink, PCI-Express, Ethernet, UCIE, RTL, ASIC
Model-written summary · the original posting is authoritative