NVIDIA
Senior Digital Design Engineer - High-Speed I/O and Photonics
$136K–$264K
US, CA, Santa Clara · Senior · Full-time · Posted Jun 8, 2026
- Experience
- 5+ years of experience in high-speed digital design.
- Education
- B.S. or M.S. degree in Electrical Engineering or equivalent experience.
About the job
Develops high-speed digital designs for DSPs, silicon photonics IPs, and chips, from frontend architecture and RTL through timing closure and post-silicon bring-up.
What you'll do
- Define chip-level features, programming models, interfaces, and micro-architecture with analog designers and system architects; translate algorithms into RTL and firmware.
- Build synthesis constraints, drive timing closure, and evaluate PPA trade-offs using synthesis and place-and-route feedback.
- Participate in silicon bring-up, debugging, characterization, performance tuning, and production testing.
What they ask for
- B.S. or M.S. degree in Electrical Engineering or equivalent experience.
- 5+ years of experience in high-speed digital design, proficient with front-end design flow and tools.
- Deep understanding of Verilog or System Verilog and logic design concepts and typical structures.
- Good understanding of design for test, timing constraints, and static timing analysis; experience with industry verification methodologies such as UVM.
Nice to have
- Knowledge of optical transceiver devices and integrated components; experience with SerDes architecture and building blocks.
- Experience with digital-assist analog designs, mixed-signal concepts and behavior modeling, communication protocols, or hardware and firmware co-design.
Pay
136,000 USD - 218,500 USD (base salary); 168,000 USD - 264,500 USD (base salary)
Tools
Verilog, System Verilog, UVM, NVLINK, Ethernet, InfiniBand, PCIe, USB
Model-written summary · the original posting is authoritative