Drimva

NVIDIA

Senior Formal Verification Engineer - LPU

$136K–$264K

US, CA, Remote +5 · Senior · Full-time · Posted Jul 6, 2026

Location
US, CA, Remote
US, TX, Remote
US, CO, Remote
US, OR, Remote
US, WA, Remote
US, MA, Remote
Experience
5+ years in ASIC verification, with 3+ years in formal verification methods.
Education
BS/MS/PhD or equivalent experience in CS/CE/EE.

About the job

Verifies AI-related ASIC designs using formal methods, developing scalable verification environments and supporting design teams through sign-off and silicon debug.

What you'll do

  • Verify ASIC builds and features, specify properties with architecture and RTL teams, and communicate verification coverage.
  • Develop formal verification environments, methodologies, and automated flows for complex ASIC designs.
  • Support silicon bring-up and debugging using formal methods where applicable.

What they ask for

  • BS/MS/PhD or equivalent experience in CS/CE/EE.
  • 5+ years in ASIC verification, including 3+ years with formal verification methods.
  • Proficiency in SystemVerilog Assertions (SVA) and formal property verification.
  • Experience with at least one formal verification tool (JasperGold, VC Formal, etc.); strong communication skills and attention to detail.

Nice to have

  • Success in full-cycle formal sign-off for complex builds; expertise in FPV apps or datapath verification.
  • Deep understanding of GPU or LPU architecture build.

Pay

136,000 USD - 218,500 USD (base salary, Level 3); 168,000 USD - 264,500 USD (base salary, Level 4)

Tools

ASIC, SystemVerilog Assertions (SVA), JasperGold, VC Formal, FPV

AI focus

Verifies AI-related ASIC designs and requires applying AI tools in daily engineering work to solve problems efficiently.

Model-written summary · the original posting is authoritative

First seen Oct 15, 2026 · Last verified Nov 5, 2026 (UTC)