Drimva

NVIDIA

Senior Formal Verification Engineer - LPU

$196K–$310K

US, CA, Remote +4 · Senior · Full-time · Posted Jul 6, 2026

Location
US, CA, Remote
US, TX, Remote
US, OR, Remote
US, WA, Remote
US, FL, Remote
Experience
12+ years in ASIC verification, with 8+ years focused on formal verification methods.
Education
BS/MS/PhD or equivalent experience in CS/CE/EE.

About the job

Verify AI-related ASIC designs and features using formal methods, define verification scope, and deliver full-cycle verification results.

What you'll do

  • Specify and verify critical design properties in collaboration with architecture and RTL teams; resolve design issues and communicate coverage.
  • Develop scalable formal verification environments, methodologies, and automated flows; mentor junior engineers.
  • Support silicon bring-up and debug using formal methods where applicable.

What they ask for

  • BS/MS/PhD or equivalent experience in CS/CE/EE.
  • 12+ years in ASIC verification, including 8+ years focused on formal verification methods.
  • Mastery of SystemVerilog Assertions (SVA) and formal property verification; proficiency with at least one industry formal verification tool.
  • Scripting skills for flow automation, such as tcl or python, and good written and oral communication skills.

Nice to have

  • Success in full-cycle formal sign-off for complex designs; expertise in formal apps such as FPV apps, sequential equivalence checks, or datapath verification.
  • Deep understanding of GPU or LPU architecture/design.

Pay

196,000 USD - 310,500 USD base salary

Tools

SystemVerilog Assertions (SVA), JapserGold, VC Formal, tcl, python

AI focus

Verify AI-related ASIC designs and features using formal verification methods.

Model-written summary · the original posting is authoritative

First seen Oct 15, 2026 · Last verified Nov 4, 2026 (UTC)