Drimva

NVIDIA

Senior FPGA Prototyping Platform Engineer

$168K–$310K

US, CA, Santa Clara · Senior · Full-time · Posted Jun 2, 2026

Experience
7+ years with a BS (or equivalent experience), or 5+ years with an MS.
Education
BS (or equivalent experience) in Electrical Engineering, Computer Engineering, or related fields; or MS.

About the job

Build, bring up, debug, and release FPGA prototypes of next-generation GPUs and SoCs on standard prototyping platforms, supporting customers and coordinating with engineering and lab teams.

What you'll do

  • Run synthesis, place and route, timing analysis, and bitstream generation for FPGA prototypes.
  • Bring up prototypes and debug hardware and software issues using platform diagnostics and lab equipment.
  • Release prototypes to customers, provide support, and coordinate with verification, software, and lab teams.

What they ask for

  • BS (or equivalent experience) in Electrical Engineering, Computer Engineering, or a related field with 7+ years of FPGA prototyping experience, or MS with 5+ years of proven FPGA prototyping experience.
  • Good understanding of FPGA prototyping hardware architecture, flows, and tools; experience with hands-on lab tasks and medium- to large-scale lab environments.
  • Experience with FPGA prototyping backend flows: synthesis, P&R, and timing closure, emphasizing Synopsys Protocompiler and Xilinx Vivado.
  • Hands-on experience with lab FPGA debug methodologies and tools (Identify and/or ChipScope), plus oscilloscopes and logic/protocol analyzers.

Nice to have

  • Independent and collaborative debugging, rapid triage, and root-cause analysis.
  • Prototyping a high-performance processor or SoC using Synopsys HAPS or FPGA platforms.

Pay

168,000 USD - 264,500 USD (base salary, Level 4); 196,000 USD - 310,500 USD (base salary, Level 5)

Tools

Synopsys Protocompiler, Xilinx Vivado, Identify, ChipScope, oscilloscopes, logic/protocol analyzers, Synopsys HAPS

Model-written summary · the original posting is authoritative

First seen Oct 16, 2026 · Last verified Nov 5, 2026 (UTC)