NVIDIA
Senior I/O Subsystem Architect
$224K–$431K
US, CA, Santa Clara · Senior · Full-time · Posted Jul 23, 2026
- Experience
- 10+ years of relevant experience in some combination of architecture, design, and verification.
- Education
- MS or PhD in Electrical Engineering, Computer Science, or Computer Engineering (or equivalent experience).
About the job
Architects NVLink chip-to-chip interconnects and protocols, guiding requirements, design, integration, and delivery across the product lifecycle.
What you'll do
- Research, model, validate, define, and document chip-to-chip communication architectures, balancing performance, area, power, security, and resiliency.
- Define interfaces and system flows for NVLink C2C blocks and drive implementation with design, verification, firmware, and software teams.
- Lead interconnect projects from concept through deployment, collaborating across engineering teams and evaluating technical trade-offs.
What they ask for
- MS or PhD in Electrical Engineering, Computer Science, or Computer Engineering (or equivalent experience).
- 10+ years of relevant experience in some combination of architecture, design, and verification.
- Proven link-layer architecture experience covering Transaction layer, Data link layer, and Physical layer.
- Experience with existing interconnects and knowledge of industry standard protocols CHI/CXL/AXI.
Pay
224,000 USD - 356,500 USD (base salary, Level 5); 272,000 USD - 431,250 USD (base salary, Level 6)
Tools
NVLink, NVLINK-C2C, PCIE, UCIE, CHI, CXL, AXI
Model-written summary · the original posting is authoritative