NVIDIA
Senior Mask Layout Design Engineer
$132K–$236K
US, CA, Santa Clara +1 · Senior · Full-time · Posted Oct 6, 2026
- Location
- US, CA, Santa Clara
US, TX, Austin - Experience
- 8+ years of relevant mask design / layout experience.
- Education
- BSEE or equivalent experience; MSEE is a plus.
About the job
Performs physical mask layout for high-speed mixed-signal circuits and integrates designs into VLSI products.
What you'll do
- Create floor plans and custom layouts for mixed-signal functions using Cadence tools.
- Work with ASIC and mixed-signal engineers to customize designs for VLSI integration.
- Verify layouts against design rules and schematics, including DRC and LVS.
What they ask for
- BSEE or equivalent experience.
- 8+ years of relevant mask design / layout experience.
- Tape-out experience with FinFET technology.
- Experience with Cadence custom circuit design tools, particularly virtuoso; experience running and debugging DRC and LVS with verification tools such as ICV/Calibre.
Nice to have
- MSEE is a plus; experience with TSMC N5/N4/N3 is preferred.
- High-speed SerDes/RF layout design, top level integration, and scripting languages like perl, python, skill are helpful or a plus.
Pay
132,000 USD - 207,000 USD (base salary, Level 4); 148,000 USD - 235,750 USD (base salary, Level 5)
Tools
Cadence, virtuoso, ICV, Calibre, TSMC N5/N4/N3, FinFET, perl, python
AI focus
NVIDIA uses AI tools in its recruiting processes; the role's stated duties do not involve AI work.
Model-written summary · the original posting is authoritative