NVIDIA
Senior Mixed Signal Design Engineer
$196K–$368K
US, CA, Santa Clara · Senior · Full-time · Posted Jan 9, 2026
- Experience
- 4+ years of design experience in CMOS analog/mixed-signal circuit design.
- Education
- MS in Electrical Engineering or equivalent experience.
About the job
Leads the design, validation, and productization of CMOS high-speed interface and mixed-signal circuits, including transceivers and PLLs.
What you'll do
- Design, simulate, and verify high-speed interface and mixed-signal circuits.
- Guide circuit and mask designers with floorplan and layout guidelines; take designs through implementation and productization.
- Support silicon lab characterization, bring-up, and debugging, and collaborate with cross-functional teams.
What they ask for
- MS in Electrical Engineering or equivalent experience.
- 4+ years of CMOS analog/mixed-signal circuit design experience.
- Extensive experience in Tx, Rx, CDR, and PLL for high-speed IO interfaces; in-depth understanding of deep submicron CMOS design issues.
- Required experience in silicon bring-up, debugging, and lab instrumentation; solid understanding of Cadence custom design tools, circuit simulators, and timing analysis tools.
Nice to have
- Knowledge of system-level timing budget, signal integrity, and power integrity.
- Experience in Verilog, Matlab, Primetime, and Nanotime.
Pay
196,000 USD - 310,500 USD (Level 5 base salary); 232,000 USD - 368,000 USD (Level 6 base salary)
Tools
CMOS, Cadence, Verilog, Matlab, Primetime, Nanotime
Model-written summary · the original posting is authoritative