NVIDIA
Senior Mixed Signal Design Engineer
$196K–$368K
US, CA, Santa Clara · Senior · Full-time · Posted Apr 16, 2026
- Experience
- 4+ years of design experience in CMOS analog / mixed-signal circuit Design.
- Education
- MS in Electrical Engineering or equivalent experience.
About the job
Leads the design, validation, and productization of CMOS high-speed interface and mixed-signal circuits, including transceivers and PLLs.
What you'll do
- Design, simulate, and verify high-speed interface and mixed-signal circuits; take designs through implementation and productization.
- Guide circuit and mask designers, including floorplan and layout guidance, and mentor designers.
- Support silicon lab characterization, bring-up, and debugging while collaborating with multifunctional teams.
What they ask for
- MS in Electrical Engineering or equivalent experience.
- 4+ years of CMOS analog/mixed-signal circuit design experience.
- Extensive Tx, Rx, CDR, and PLL experience for high-speed IO interfaces; deep submicron CMOS knowledge.
- Silicon bring-up, debugging, and lab instrumentation experience; understanding of Cadence custom design tools, circuit simulators, and timing analysis tools.
Nice to have
- Knowledge of system-level timing budget, signal integrity, and power integrity.
- Experience in Verilog, Matlab, Primetime, Nanotime.
Pay
196,000 USD - 310,500 USD (base salary, Level 5); 232,000 USD - 368,000 USD (base salary, Level 6)
Tools
CMOS, Cadence, Verilog, Matlab, Primetime, Nanotime
AI focus
NVIDIA uses AI tools in its recruiting processes; the role's duties do not specify AI work.
Model-written summary · the original posting is authoritative