NVIDIA
Senior Mixed Signal Design Engineer
$168K–$310K
US, CA, Santa Clara · Senior · Full-time · Posted Mar 4, 2026
- Experience
- 4+ years of high-speed DRAM (LPDDR5/6, DDR4/5, GDDR5/6/7, HBM3/4) or other SerDes interface-related design experience.
- Education
- MS/PhD in Electrical Engineering or equivalent experience.
About the job
Design and develop mixed-signal, analog, and I/O circuits for high-speed DRAM SerDes interfaces, from architecture through productization.
What you'll do
- Design high-speed memory I/O circuits and address design challenges in CMOS FinFET processes.
- Take designs through productization and work with cross-functional teams to optimize them.
- Contribute to architecture and development of next-generation memory systems and interfaces.
What they ask for
- MS/PhD in Electrical Engineering or equivalent experience.
- In-depth understanding of deep submicron CMOS FinFET processes and related circuit design issues.
- Familiarity with device reliability, ESD, and Latch-Up requirements.
- Understanding of system-level timing budgets, specifications, and analysis.
Nice to have
- Package substrate, board development, and power delivery knowledge.
- Knowledge of Verilog, Nanotime, Matlab, or similar tools; hands-on silicon debug experience is also a plus.
Pay
168,000 USD - 264,500 USD (base salary, Level 4); 196,000 USD - 310,500 USD (base salary, Level 5)
Tools
CMOS FinFET, Cadence custom develop tools, Hspice, XA, FineSim, Spectre, Verilog, Matlab
AI focus
The role involves no stated AI design work. NVIDIA states that it uses AI tools in its recruiting processes.
Model-written summary · the original posting is authoritative