NVIDIA
Senior Mixed-Signal Design Engineer
$136K–$264K
US, CA, Santa Clara · Senior · Full-time · Posted Mar 10, 2026
- Experience
- 5+ years of proven experience.
- Education
- Bachelor’s degree in EE, CS, or CE (or equivalent experience).
About the job
Verify mixed-signal CMOS circuit designs and implementations for leading GPUs and SoCs, including defining verification scope and developing verification infrastructure.
What you'll do
- Verify mixed-signal CMOS circuit designs, architectures, and golden models using advanced verification methodologies.
- Define verification scope, build verification infrastructure, and verify design correctness.
- Collaborate with circuit and logic design, verification, and test engineering teams.
What they ask for
- Bachelor’s degree in EE, CS, or CE (or equivalent experience).
- Experience in deep sub-micron CMOS analog/mixed-signal circuit design.
- Experience crafting testbench environments for component and top-level circuit verification.
- Expertise in System Verilog or similar HVL.
Nice to have
- Experience with Cadence’s IC design environment and analog circuit simulation tools such as HSpice, Finesim, and XA.
- Perl and C/C++ programming experience.
Pay
136,000 USD - 218,500 USD base salary (Level 3); 168,000 USD - 264,500 USD base salary (Level 4)
Tools
Cadence's IC design environment, HSpice, Finesim, XA, System Verilog, Perl, C/C++
AI focus
NVIDIA uses AI tools in its recruiting processes; the role is connected to product lines including artificial intelligence, but no specific AI work is stated.
Model-written summary · the original posting is authoritative