NVIDIA
Senior Physical Design Engineer
$136K–$264K
US, MA, Westford · Senior · Full-time · Posted Oct 2, 2026
- Experience
- 5 years of experience in VLSI physical design implementation on 5nm, 4nm and 3nm technology.
- Education
- BSEE / MSEE or equivalent experience.
About the job
Leads physical design and implementation of networking-market SoCs, from RTL-to-GDS development through chip assembly and timing closure.
What you'll do
- Lead physical design and implementation at partition and chiplet level.
- Help establish physical design methodologies and automate flows; work on floorplanning, power/clock distribution, chip assembly, and place and route.
- Perform synthesis, timing closure, power and noise analysis, and physical verification.
What they ask for
- BSEE / MSEE or equivalent experience.
- 5 years of VLSI physical design implementation experience on 5nm, 4nm and 3nm technology.
- Successful track record of delivering designs to production.
- Strong power-user experience with P&R, Timing Analysis, Physical Verification, IR Drop Analysis, and CAD tools from Synopsys, Cadence, or other major EDA companies.
Nice to have
- Proficiency using Python, Perl, Tcl, Make scripting is helpful.
Pay
136,000 USD - 218,500 USD (base salary, Level 3); 168,000 USD - 264,500 USD (base salary, Level 4)
Tools
Synopsys, ICC2, DC, PT, STAR, ICV, Cadence, Python
AI focus
Assist in design flow development and debugging, including application of ML/AI solutions.
Model-written summary · the original posting is authoritative