NVIDIA
Senior Physical Design Methodology Engineer, PPA Improvement Technology Scaling
$168K–$310K
US, CA, Santa Clara +1 · Senior · Full-time · Posted Oct 28, 2026
- Location
- US, CA, Santa Clara
US, TX, Austin - Experience
- Minimum 5 years’ experience in Physical Design Engineering.
- Education
- MS in Electrical or Computer Engineering (or equivalent experience)
About the job
Develop physical design methodologies and PPA improvement solutions for graphics processors and SoCs, including technology experiments and design automation.
What you'll do
- Develop physical design methodologies and creative solutions for graphics processors and SoCs.
- Run PPA experiments across projects, including floorplanning, power and clock distribution, place and route, timing closure, power/noise analysis, and back-end verification.
- Develop scripts and automation for early design collateral, library-cell analysis, and design-constraint updates.
What they ask for
- Minimum 5 years’ experience in Physical Design Engineering.
- Familiarity with chip design areas including floorplanning, clock and power distribution, place and route, integration, and verification.
- Strong background in hierarchical and top-down design, budgeting, timing, and physical convergence; familiarity with yield/manufacturability, EM/IR closure, and thermal management.
- Expertise in industry-standard EDA tools and proficiency in Perl, Python, or C++.
Nice to have
- Experience with Physical Design related to CPU designs.
Pay
168,000 USD - 264,500 USD (base salary, Level 4); 196,000 USD - 310,500 USD (base salary, Level 5)
Tools
Perl, Python, C++, EDA tools
Model-written summary · the original posting is authoritative